Automatic Bug Detection in Microcontroller Software by Static Program Analysis Ansgar Fehnker1 , Ralf Huuck1 , Bastian Schlich2 , and Michael Tapp1 2

Source URL: www.cse.unsw.edu.au

• Embedded systems
• Central processing unit
• Special function register
• Immunity-aware programming
• Computer architecture
• Interrupts
• Microcontrollers

Designing an Analyzable and Resilient Embedded Operating System Philip Axer, Rolf Ernst TU Braunschweig Institute of Computer and Network Engineering {axer,ernst}@ida.ing.tu-bs.de

Source URL: www.danceos.org

• Fault-tolerant computer systems
• Central processing unit
• Computer errors
• Computer memory
• Fault-tolerant system
• Software
• Crash
• LEON
• Ring
• Computing
• Computer hardware
• Computer architecture

EE432 Advanced Digital Design with HDL Term Project Spring 2013 Instructor — Tom Almy I (the instructor) am always looking for ways to make the courses interesting,

Source URL: www.almy.us

• Central processing unit
• Minicomputers
• PDP-8
• CPU design
• Digital Equipment Corporation
• Microcode
• Bus
• Computer
• Operating system
• Computer hardware
• Computer architecture
• Classes of computers

16-BIT V SERIESTMAND 16-BIT MICROPROCESSORS INSTRUCTION V20TM, V30TM

Source URL: www.buchty.net

• Semiconductor companies
• Digital electronics
• Instruction set architectures
• Mitsui
• NEC
• Intel
• Central processing unit
• V30
• DEC Alpha
• Electronic engineering
• Computer hardware
• Computer architecture

A Unified Modulo Scheduling and Register Allocation Technique for Clustered Processors Josep M. Codina, Jesús Sánchez and Antonio González Department of Computer Architecture Universitat Politècnica de Catalunya Barc

Source URL: research.ac.upc.edu

• Parallel computing
• Concurrent computing
• Central processing unit
• Instruction scheduling
• Very long instruction word
• Register allocation
• Computer cluster
• Processor register
• Thread
• Computing
• Computer architecture
• Compiler optimizations

Central Foster Care Unit. Social \'Velfare Department 保!!UI

Source URL: www.swd.gov.hk.

Toward Predictable Performance in Software Packet-Processing Platforms Mihai Dobrescu EPFL, Switzerland Katerina Argyraki

Source URL: www.eecs.berkeley.edu

• Microprocessors
• CPU cache
• Central processing unit
• Computer memory
• Electronics
• Multi-core processor
• Packet Processing
• Xeon
• Transmission Control Protocol
• Computing
• Computer hardware
• Cache

The University of Hertfordshire The Challenges facing Libraries and Imperative Languages from Massively Parallel Architectures Jason McGuiness

Source URL: accu.org

• Central processing unit
• Parallel computing
• Classes of computers
• Microprocessors
• Instruction-level parallelism
• Superscalar
• Very long instruction word
• CPU cache
• Instruction set
• Computer architecture
• Computing
• Computer hardware

Who Cares About the Memory Hierarchy? CS252 Graduate Computer Architecture Lecture 4

Source URL: www.cs.berkeley.edu

• Cache
• Central processing unit
• CPU cache
• Alpha 21164
• Memory hierarchy
• Dynamic random-access memory
• Compiler optimization
• Write buffer
• Cache algorithms
• Computer memory
• Computer hardware
• Computing

AMD’s Commitment to Accelerating Energy Efficiency Sam Naffziger, AMD Corporate Fellow / IEEE Fellow The remarkable performance advances in computing since the birth of the modern microprocessor can be largely attribut

Source URL: www.amd.com

• Energy conservation
• Advanced Micro Devices
• ATI Technologies
• Power management
• Radeon
• Accelerated processing unit
• AMD mobile platform
• Bulldozer
• Computer hardware
• Computing
• Central processing unit